MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 351

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

18.5.1
This register contains the address that the I
18.5.2
The MFDR provides a programmable prescalar to configure the clock for bit rate selection.
Freescale Semiconductor
Address MBAR+$280 (MADR)
Reset
W
Field
ADR
R
7–1
0
MBAR2+$440 (MADR2)
I
I
ADR7
2
2
0
7
C Address Registers (MADR)
C Frequency Divider Registers (MFDR)
External masters cannot access the MCF5253 on-chip memories or MBAR,
but can access any I
It is not the address sent on the bus during the address transfer.
Slave Address. Bit 1 to bit 7 contains the specific slave address to be used by the I
Reserved.
MBAR2 + $44C
ADR6
MBAR2 + $440
MBAR2 + $444
MBAR2 + $448
MBAR2 + $450
Table 18-1. I
MBAR+$28C
MBAR+$288
MBAR+$290
0
6
Address
Table 18-2. MADR Register Field Descriptions
2
C module register.
2
ADR5
MCF5253 Reference Manual, Rev. 1
C Interfaces Register Summary (continued)
0
5
Figure 18-4. MADR Register
MBAR2 I
2
C will respond to when addressed as a slave.
MBAR2 I
MBAR2 I
MBAR2 I
MBAR2 I
2
I
C Frequency Divider Register (MFDR2)
I
2
ADR4
2
I
NOTE
NOTE
C Data I/O Register (MBDR)
2
C Control Register (MBCR)
C Status Register (MBSR)
0
4
I
2
2
2
2
C Data I/O Register (MBDR2)
C Module Registers
C Address Register (MADR2)
2
C Control Register (MBCR2)
C Status Register (MBSR2)
Description
ADR3
3
0
ADR2
Access: Supervisor or User read/write
0
2
2
ADR1
C module.
0
1
I
2
C Modules
0
0
18-7