MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 321

IC MPU 32BIT 140MHZ 225-MAPBGA

MCF5253CVM140

Manufacturer Part Number
MCF5253CVM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253CVM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
225-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

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1
17.6.2.1
The “C” channel includes control bits such as data valid, copy protected, transmitted sample rate etc.
17.6.2.2
There are three transmitter interrupt conditions:
17.6.2.3
The IEC958 transmitter is compliant with IEC958-3 Ed2 and Tech 3250-E documents from international
IEC standards committee and European Broadcasting Union organizations.
The IEC958 transmitter implementation allows any sample frequency. Operation is guaranteed up to a
maximum incoming transmit clock of 16MHz. The mark/space ratio of the transmit clock must be equal
to or better than 38/62.
17.6.2.4
The user channel transmitter is intended to assemble the CD subcode stream, and conform to the IEC958
CD standard specification. The generation of the data needs to be done in software and loaded into
hardware registers. The Audio peripheral has provisions to insert this CD subcode stream into the outgoing
Freescale Semiconductor
Ordering of bits in Ebu1TxCChannel1 is MSB sent out first. So, Ebu1TxCChannel1(31) is sent out as IEC958 bit 0.
1. Transmit FIFO underrun
2. Transmit FIFO overrun
3. Transmit FIFO empty
MBAR2 + 0xDC
MBAR2 + 0x28
IEC958 Bits
Address
32–191
0–31
Transmit “C” Channel
IEC958 Transmitter Interrupt Conditions
IEC958-3 Ed2 and Tech 3250-E Standards Compliance
Transmission of U-Channel and CD Subcode Data
EBUOUT1 will output a clock signal just after reset and before they can be
configured as GPIO. The frequency of the clock output will be CRIN/16.
1
EBU1TxC
EBU1TxC
Channel1
Channel2
Table 17-12. Formatting of EBUOUTn (Consumer “C” Channel)
Name
Table 17-11. EBUnTxCChannel Registers Addresses
Field Name
CONTROL
Width
32
32
MCF5253 Reference Manual, Rev. 1
“C” channel bit settings for IEC958 transmitter —
Consumer format
NOTE
Relevant data
Description
Description
EBUnTXCCHANNEL1(31:0)
Audio Interface Module (AIM)
Undefined
Taken From
Reset
Value
Always 0
Access
RW
17-23

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