MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 262

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

UART Modules
15.4.2
The UART mode register 2 (UMR2n) controls the UART module configuration. UMR2n can be read or
written when the mode register pointer points to it, which occurs after any access to UMR1n. Accesses to
UMR2n do not update the pointer.
15-16
Field
Address MBAR + $1C0 (UMR20)
1–0
B/C
PT
2
Reset
W
R
MBAR + $200 (UMR21)
MBAR2 + $C00 (UMR22)
The Parity Type bit selects the parity type if parity is programmed by the parity mode bits; if multidrop mode is
selected, it configures the transmitter for data character transmission or address character transmission.
lists the parity mode and type or the multidrop mode for each combination of the parity mode and the parity type
bits.
“Force parity low” means forcing a 0 parity bit.
“Force parity high” forces a 1 parity bit.
The Bits per Character bits select the number of data bits per character to be transmitted. The character length
listed in
Mode Register 2 (UMR2n)
CM1
0
7
Table 15-4
Table 15-2. Mode Register 1 (UMR1n) Field Descriptions (continued)
CM0
does not include start, parity, or stop bits.
6
0
PM1
0
0
0
0
1
1
1
Table 15-5. Mode Register 2 (UMR2)
MCF5253 Reference Manual, Rev. 1
TxRTS
PM0
0
5
Table 15-3. PMx and PT Control Bits
0
0
1
1
0
1
1
B/C1
0
0
1
1
Table 15-4. B/Cx Control Bits
Multidrop Mode
Multidrop Mode
Parity Mode
Force Parity
Force Parity
With Parity
With Parity
B/C0
No Parity
TxCTS
0
1
0
1
0
4
Description
Bits/Character
SB3
PT
5 Bits
6 Bits
7 Bits
8 Bits
3
0
X
0
1
0
1
0
1
Address Character
Data Character
Parity Types
Even Parity
High Parity
Odd Parity
Low Parity
No Parity
Access: Supervisor or User read/write
SB2
0
2
Freescale Semiconductor
SB1
0
1
Table 15-3
SB0
0
0