MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 441

IC MPU 32BIT 140MHZ 225-MAPBGA

MCF5253CVM140

Manufacturer Part Number
MCF5253CVM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253CVM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
225-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

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MBAR2 + 0x800
(TIME_OFF)
MBAR2 + 0x801
(TIME_ON)
MBAR2 + 0x802 (TIME_1)
MBAR2 + 0x803
(TIME_2W)
MBAR2 + 0x804
(TIME_2R)
MBAR2 + 0x805
(TIME_AX)
MBAR2 + 0x80F
(TIME_PIO_RDX)
MBAR2 + 0x807 (TIME_4)
MBAR2 + 0x808 (TIME_9)
MBAR2 + 0x809 (TIME_M)
Address
Address
Address
MBAR2 + 0x80D
(TIME_ACK)
Address
MBAR2 + 0x80F
(TIME_PIO_RDX)
Address
MBAR2 + 0x811
(TIME_MLIX)
MBAR2 + 0x812
(TIME_DVH)
Address
Address
Address
23.5.1
Table 23-8
Freescale Semiconductor
Address
shows the ATA memory map.
Memory Map
TIME_PIO_RDX
TIME_DZFS
TIME_MLIX
TIME_ENV
TIME_RPX
TIME_CVH
TIME_OFF
TIME_ACK
TIME_ZAH
TIME_DVH
TIME_DVS
TIME_ON
TIME_2W
TIME_2R
TIME_AX
TIME_JN
Register
TIME_M
TIME_D
TIME_K
TIME_1
TIME_4
TIME_9
MCF5253 Reference Manual, Rev. 1
Table 23-8. ATA Memory Map
Transceiver timing parameter.
Controls toff
Transceiver timing parameter.
Controls ton
PIO timing parameter.
Controls t1
PIO timing parameter.
Controls t2 during write cycles
PIO timing parameter.
Controls t2 during read cycles
PIO timing parameter.
Controls tA
PIO timing parameter.
Controls trd
PIO timing parameter.
Controls t4
PIO timing parameter.
Controls t9
MDMA timing parameter.
Controls tm
MDMA timing parameter.
Controls tn and tj
MDMA timing parameter.
Controls td
MDMA timing parameter.
Controls tk
UDMA timing parameter.
Controls tack
UDMA timing parameter.
Controls tenv
UDMA timing parameter.
Controls trp
UDMA timing parameter.
Controls tzah
UDMA timing parameter.
Controls tmli
UDMA timing parameter.
Controls tdvh
UDMA timing parameter.
Controls tdzfs
UDMA timing parameter.
Controls tdvs
UDMA timing parameter.
Controls tcvh
Description
Advanced Technology Attachment Controller (ATA)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
0x01
23.5.2.2.10/23-22
23.5.2.2.11/23-22
23.5.2.2.12/23-22
23.5.2.2.13/23-23
23.5.2.2.14/23-23
23.5.2.2.15/23-23
23.5.2.2.16/23-23
23.5.2.2.17/23-24
23.5.2.2.18/23-24
23.5.2.2.19/23-24
23.5.2.2.20/23-25
23.5.2.2.21/23-25
23.5.2.2.22/23-25
23.5.2.2.1/23-19
23.5.2.2.2/23-19
23.5.2.2.3/23-20
23.5.2.2.4/23-20
23.5.2.2.5/23-20
23.5.2.2.6/23-21
23.5.2.2.7/23-21
23.5.2.2.8/23-21
23.5.2.2.9/23-21
Section/Page
23-15

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