MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 341

IC MPU 32BIT 140MHZ 225-MAPBGA

MCF5253CVM140

Manufacturer Part Number
MCF5253CVM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5253CVM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
225-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

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Upon request Freescale can supply example s/w code that implements the Frequency measurement and
controls the XTRIM output to allow CRIN to be locked to the EBU clock input.
The PLL maintaining phase relation between the incoming source signal and internal signal is mainly
digital. It is necessary, however, to measure the phase/frequency of the incoming signal in relationship with
the CRIN clock in order to be able to steer the sample rate convertor clock. The circuit shown in
Figure 17-24
Associated with the Frequency measurement block are two registers. (See
measure the frequency of the incoming clock by comparison with the audio CRIN clock (which is typically
16.93 MHz or 11.2896MHz). Multiplexer (1) selects the incoming clock source. Registers (2),(3), and xor
(4) are an edge detector. Multiplexer (5) is a by-pass for the IEC958 input. The rest of the circuit is a
second-order filter with a bandwidth of approximately 80 Hz. The output FreqMeas(31:0) is an unsigned
number, giving the frequency of the selected source as a function of the CRIN clock. The filter is calculated
internally in 48 bit precision. The 16 LSBs are not sent out.
The value read from the FreqMeas Register is calculated as follows:
Freescale Semiconductor
For measurement of the IIS inputs: FreqMeas = (IIS SCLK Freq × 2)/Faudio × (2 ** 15) × Gain
For measurement of the EBU input: FreqMeas = (EBU Freq) / Faudio × (2 ** 15) × Gain
MBAR2 + 0xA3
MBAR2 + 0xA8
Address
is used for maintaining this phase relationship.
Table 17-24. PhaseConfig and Frequency Measure Register Addresses
SCLK1
SCLK2
SCLK3
EBU-In
Select
CRIN
PhaseConfig
FreqMeas
Name
Figure 17-24. Frequency Measurement Circuit
15
1
6
11
MCF5253 Reference Manual, Rev. 1
Width
+
+
D
32
8
2
7
12
Phase Configuration (gain and source select)
sat
sat
13
8
3
D
9
Frequency measurement
D
14
D
Description
xor
4
FreqMeas[31:0]
10
5
Table
17-24). The circuit will
16
Audio Interface Module (AIM)
Access
R/W
R
17-43

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