MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 163

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Both writes must occur in the order listed prior to the SWT timeout, but any number of instructions or
accesses to the SWSR can be executed between the two writes. This allows interrupts and exceptions to
occur, if necessary, between the two writes.
Caution should be exercised when changing system protection control register (SYPCR) values after the
software watchdog timer (SWT) has been enabled with the setting of the SWE register bit, because it is
difficult to determine the state of the SWT while the timer is running. The SWP and SWT[1:0] bits in
SYPCR determine the SWT timeout period. The countdown value determined by the SWP and SWT[1:0]
bits is constantly compared with that specified by these bits. Therefore, altering the contents of the SWP
and SWT[1:0] bits improperly will result in unpredictable processor behavior. The following steps must
be taken in order to change one of these values in the SYPCR:
9.5.2.1
The SYPCR controls the software watchdog timer, timeout periods, and software watchdog timer transfer
acknowledge.
The SYPCR is an 8-bit read-write register. The register can be read at any time, but can be written only if
SWT IRQ is not pending. At system reset, the software watchdog timer is disabled.
Freescale Semiconductor
SWRI
Field
SWE
SWP
Address MBAR + $01
1. Disable SWT by writing a 0 to the SWE bit in SYPCR.
2. Service the SWSR, write $55, then write $AA to SWSR. This action resets the counter.
3. Re-write new SWT[1:0] and SWP values to SYPCR register.
4. Re-enable SWT by writing a 1 to SWE bit in SYPCR. Users can perform this task in Step 3.
7
6
5
Reset
W
R
Software Watchdog Enable
0 SWT disabled.
1 SWT enabled.
Software Watchdog Reset/Interrupt Select
0 If SWT timeout occurs, SWT generates an interrupt to the core processor at the level programmed into the IL
1 SWT causes soft reset to be asserted for all modules of the part.
Software Watchdog Prescalar
0 SWT clock not prescaled.
1 SWT clock prescaled by a value of 8192.
bits of ICR0.
System Protection Control Register
SWE
Table 9-18. System Protection Control Register (SYPCR) Field Descriptions
0
7
Figure 9-11. System Protection Control Register (SYPCR)
SWRI
0
6
MCF5253 Reference Manual, Rev. 1
SWP
0
5
SWT[1]
0
4
Description
SWT[0]
0
3
SWTA
0
2
System Integration Module (SIM)
SWTAVAL
Access: User read/write
0
1
–
0
9-19