R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 98

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 3 Floating-Point Unit (FPU)
3.4
In a floating-point instruction, rounding is performed when generating the final operation result
from the intermediate result. Therefore, the result of combination instructions such as FMAC will
differ from the result when using a basic instruction such as FADD, FSUB, or FMUL. Rounding is
performed once in FMAC, but twice in FADD, FSUB, and FMUL.
Which of the two rounding methods is to be used is determined by the RM bits in FPSCR.
FPSCR.RM[1:0] = 00: Round to Nearest
FPSCR.RM[1:0] = 01: Round to Zero
(1)
The operation result is rounded to the nearest expressible value. If there are two nearest
expressible values, the one with an LSB of 0 is selected.
If the unrounded value is 2
unrounded value. The values of Emax and P, respectively, are 127 and 24 for single-precision, and
1023 and 53 for double-precision.
(2)
The digits below the round bit of the unrounded value are discarded.
If the unrounded value is larger than the maximum expressible absolute value, the value will
become the maximum expressible absolute value.
Rev. 2.00 Sep. 07, 2007 Page 70 of 1164
REJ09B0321-0200
Round to Nearest
Round to Zero
Rounding
Emax
(2 – 2
–P
) or more, the result will be infinity with the same sign as the