R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 1045

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

26.4
26.4.1
Figure 26.2 shows the internal states of the TAP controller.
Note: The transition condition is the UDTMS value at the rising edge of UDTCK. The UDTDI
value is sampled at the rising edge of UDTCK; shifting occurs at the falling edge of
UDTCK. For details on change timing of the UDTDO value, see section 26.4.3, UDTDO
Output Timing. The UDTDO is at high impedance, except with shift-DR and shift-IR
states. There is a transition to test-logic-reset asynchronously with UDTCK by UDTRST
assertion or deep standby mode.
Operation
TAP Controller
1
0
Test -logic-reset
Run-test/idle
0
Figure 26.2 TAP Controller State Transitions
1
1
0
Select-DR
Capture-DR
Update-DR
1
Pause-DR
Exit1-DR
Exit2-DR
Shift-DR
0
1
0
1
1
0
0
1
0
0
1
Section 26 User Debugging Interface (H-UDI)
Rev. 2.00 Sep. 07, 2007 Page 1017 of 1164
1
0
Select-IR
Capture-IR
Update-IR
1
Pause-IR
Exit1-IR
Exit2-IR
0
0
Shift-IR
1
0
1
1
0
REJ09B0321-0200
1
0
0
1