R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 817

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
When the SSI module acts as a transmitter, each word written to SSITDR is transmitted to the
serial audio bus in the order they are written. When the SSI module acts as a receiver, each word
received by the serial audio bus is read in the order received from the SSIRDR register.
Figures 18.7 to 18.9 show how 2, 3 and 4 channels are transferred to the serial audio bus. Note that
there are no padding bits in the first example, the second example is left-aligned and the third is
right-aligned. This selection is arbitrary and is just for demonstration purposes only.
SCKP = 0, SWSP = 0, DEL = 1, CHNL = 10, SPDP = 1, SDTA = 0
System word length = data word length × 3
SSISCK
SSIWS
SSIDATA
SCKP = 0, SWSP = 0, DEL = 1, CHNL = 01, SPDP = don't care, SDTA = don't care
System word length = data word length × 2
SSISCK
SSIWS
SSIDATA
Figure 18.8 Multichannel Format (3 Channels with High Padding)
Figure 18.7 Multichannel Format (2 Channels Without Padding)
MSB
LSB
word 1
Data
MSB
word 1
Data
System word 1
LSB
LSB
MSB
MSB
System word 1
word 2
Data
word 2
Data
LSB MSB
LSB MSB
word 3
Data
System word 2
word 3
Data
LSB MSB
word 4
Data
LSB
LSB
MSB
MSB
word 1
word 4
Data
System word 1
Data
LSB
Rev. 2.00 Sep. 07, 2007 Page 789 of 1164
LSB MSB
MSB
Section 18 Serial Sound Interface (SSI)
word 2
Data
System word 2
word 5
LSB MSB
Data
word 3
LSB MSB
Data
System word 2
LSB MSB
word 6
Data
word 4
REJ09B0321-0200
Data
LSB
LSB
MSB
MSB

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