R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 1035

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Execute read and write of an arbitrary
Set the bits CKS2 to CKS0 in DSCNT
Set RAMKP bit in RAMKP as needed
Figure 25.2 Flowchart of Transition to Deep Standby Mode
but the same address for each page
so that the initial value of FRQCR
Transition to deep standby mode
in the CPG become larger than
Set the STBY and DEEP bits
Set INTC register as needed
the oscillation settling time.
Execute SLEEP instruction
in the retaining RAM area.
Program executing state
Clear the flag in DSFR
in STBCR to 1.
Read STBCR
Interrupt processing routine
Rev. 2.00 Sep. 07, 2007 Page 1007 of 1164
Execute RTE instruction
Clear the flag in DSFR
Section 25 Power-Down Modes
REJ09B0321-0200

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