R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 132

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 5 Exception Handling
5.6
5.6.1
Table 5.8 shows the sources that start up interrupt exception handling. These are divided into
NMI, user breaks, H-UDI, IRQ, PINT, and on-chip peripheral modules.
Table 5.8
Each interrupt source is allocated a different vector number and vector table offset. See table 6.4
in section 6, Interrupt Controller (INTC), for more information on vector numbers and vector table
address offsets.
Rev. 2.00 Sep. 07, 2007 Page 104 of 1164
REJ09B0321-0200
Type
NMI
User break
H-UDI
IRQ
PINT
On-chip peripheral module
Interrupts
Interrupt Sources
Interrupt Sources
Request Source
NMI pin (external input)
User break controller (UBC)
User debugging interface (H-UDI)
IRQ0 to IRQ7 pins (external input)
PINT0 to PINT7 pins (external input)
A/D converter (ADC)
Multifunction timer pulse unit 2 (MTU2)
Realtime clock (RTC)
Watchdog timer (WDT)
I²C bus interface 3 (IIC3)
Direct memory access controller (DMAC)
Serial communication interface with FIFO (SCIF)
Controller area network (RCAN-ET)
Serial sound interface (SSI)
8-bit timer (TMR)
Number of
Sources
1
8
8
1
28
3
1
15
9
32
2
2
6
1
1

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