R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 578

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
12.7.4
If the counter clear signal is generated in the T2 state of a TCNT write cycle, TCNT clearing takes
precedence and the TCNT write is not performed.
Figure 12.109 shows the timing in this case.
12.7.5
If incrementing occurs in the T2 state of a TCNT write cycle, the TCNT write takes precedence
and TCNT is not incremented.
Figure 12.110 shows the timing in this case.
Rev. 2.00 Sep. 07, 2007 Page 550 of 1164
REJ09B0321-0200
Figure 12.110 Contention between TCNT Write and Increment Operations
Contention between TCNT Write and Clear Operations
Contention between TCNT Write and Increment Operations
Figure 12.109 Contention between TCNT Write and Clear Operations
Pφ
Address
Write signal
Counter clear
signal
TCNT
Pφ
Address
Write signal
TCNT input
clock
TCNT
TCNT write data
TCNT write cycle
N
TCNT write cycle
N
TCNT address
TCNT address
T1
T1
T2
T2
H'0000
M