R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 1177

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

[Legend]
I:
O:
H:
L:
Z:
K:
Notes: 1. When pins for the connection with a crystal resonator are not used, the EXTAL and
I/O ports
Type
Input
Output
High-level output
Low-level output
High-impedance
Input pins become high-impedance, and output pins retain their state.
2. Power-on reset by low-level input to the RES pin. The pin states after a power-on reset
3. IRQ pins that can release deep standby mode are limited to PE7 to PE4 and PC25 to
4. Z when the TAP controller of the H-UDI is neither the Shift-DR nor Shift-IR state.
5. L when the CKIO output is specified and Z when the CKIO output is stopped with the
Pin Function
PC25 to PC22
PC21 to PC13
PC12, PC11
PC10
PC9
PC8
PC7 to PC1
PC0
PD16, PD15
PD14 to PD0
PE7 to PE0
PF7 to PF0
AUDIO_X1 pins must be pulled up and the XTAL and AUDIO_X2 pins must be open.
The RTC_X1 pin must be connected to GND and the RTC_X2 must be open.
by the H-UDI reset assert command or WDT overflow are the same as the initial pin
states at normal operation (see section 23, Pin Function Controller (PFC)).
PC22.
setting of CKIOCR.
Pin Name
I
I
I
I
H
H
I
H
I
I
I
I
8 Bits
Area 0 Data Bus Width
Power-On*
I
I
I
H
H
H
I
H
I
I
I
I
16 Bits
Reset State
I
I
H
H
H
H
I
H
I
I
I
I
2
32 Bits Manual
Rev. 2.00 Sep. 07, 2007 Page 1149 of 1164
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
I
I/O
Pin State
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
I
I/O
Sleep
Power-Down State
Z
Z
Z
K
K
K
K
K
K
K
K
K
Software
Standby
REJ09B0321-0200
Z
K
K
K
K
K
K
K
Z
K
Z
K
Standby
Appendix
Deep