R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 677

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

15.3.12 Day of Week Alarm Register (RWKAR)
RWKAR is an alarm register corresponding to the BCD coded day of week counter RWKCNT.
When the ENB bit is set to 1, a comparison with the RWKCNT value is performed. From among
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR/RCR3, the counter and alarm
register comparison is performed only on those with ENB bits set to 1, and if each of those
coincides, an alarm flag of RCR1 is set to 1.
The assignable range is from 0 through 6 + ENB bits (practically in BCD), otherwise operation
errors occur.
The ENB bit in RWKAR is initialized by a power-on reset or in deep standby mode. The other bits
are not initialized by a power-on reset or manual reset, or in deep standby and software standby
modes.
Bit
7
6 to 3
2 to 0
Bit Name
ENB

Day
Initial value:
Initial
Value
0
All 0
Undefined R/W
R/W:
Bit:
ENB
R/W
7
0
R/W
R/W
R
—
R
6
0
Description
When this bit is set to 1, a comparison with the
Reserved
These bits are always read as 0. The write value should
always be 0.
Day of week setting value
000: Sunday
001: Monday
010: Tuesday
011: Wednesday
100: Thursday
101: Friday
110: Saturday
111: Reserved (setting prohibited)
RWKCNT value is performed.
—
R
5
0
—
R
4
0
—
R
3
0
Rev. 2.00 Sep. 07, 2007 Page 649 of 1164
R/W
—
2
R/W
Day
—
1
Section 15 Realtime Clock (RTC)
R/W
—
0
REJ09B0321-0200