R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 789

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

No
No
Clear ACKBT in ICIER to 0
Set ACKBT in ICIER to 1
Dummy-read ICDRR
Read RDRF in ICSR
Read RDRF in ICSR
Slave receive mode
Clear AAS in ICSR
Last receive - 1?
Figure 17.21 Sample Flowchart for Slave Receive Mode
Read ICDRR
Read ICDRR
Read ICDRR
RDRF = 1 ?
RDRF = 1 ?
End
Yes
Yes
No
Yes
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[1] Clear the AAS flag.
[2] Set acknowledge to the transmit device.
[3] Dummy-read ICDRR.
[4] Wait for 1 byte to be received.
[5] Check whether it is the (last receive - 1).
[6] Read the receive data.
[7] Set acknowledge of the last byte.
[8] Read the (last byte - 1) of receive data.
[9] Wait the last byte to be received.
[10] Read for the last byte of receive data.
Note: When the size of receive data is only one byte in
reception, steps [2] to [6] are skipped after
step [1], before jumping to step [7]. The step [8]
is dummy-read in ICDRR.
Rev. 2.00 Sep. 07, 2007 Page 761 of 1164
Section 17 I
2
C Bus Interface 3 (IIC3)
REJ09B0321-0200