R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 884

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 19 Controller Area Network (RCAN-ET)
Figure 19.8 - Halt Mode/Sleep Mode shows allowed state transition.
• Please don't set MCR5 (Sleep Mode) without entering Halt Mode.
• After setting MCR1, make sure that GSR4 is set and the RCAN-ET has entered Halt Mode
Rev. 2.00 Sep. 07, 2007 Page 856 of 1164
REJ09B0321-0200
before clearing MCR1.
Notes: 1. MCR5 can be cleared by automatically by detecting a dominant bit on the CAN Bus if MCR7
Clear MCR1
and MCR5
Except Transmitter/Receiver/BusOff, if MCR6 = 0
BusOff or except Transmitter/Receiver, if MCR6 = 1
2. MCR1 is cleared in SW. Clearing MCR1 and setting MCR5 have to be carried out by the
3. MCR1 must not be cleared in SW, before GSR4 is set. MCR1 can be set automatically in HW
4. When MCR5 is cleared and MCR1 is set at the same time, RCAN-ET moves to Halt Request.
is set or by writing "0".
same instruction.
when RCAN-ET moves to Bus Off and MCR14 and MCR6 are both set.
Right after that, it moves to Halt Mode with no reception/transmission.
Set MCR1*
Halt Request
Halt Mode
Figure 19.8 Halt Mode/Sleep Mode
3
Transmission
Clear MCR1*
Reception
Set MCR5
Reset
Power On/SW Reset
clear MCR0
and GSR3 = 0
2
Clear MCR5
Set MCR1*
Clear MCR5*
Sleep Mode
4
1