R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 894

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 19 Controller Area Network (RCAN-ET)
Notes: 1. Available only in Test Mode.
Rev. 2.00 Sep. 07, 2007 Page 866 of 1164
REJ09B0321-0200
Channel
1
2. RM0 is an interrupt generated by the remote request pending flag for mailbox 0
3.
(RFPR0[0]) or the data frame receive flag for mailbox 0 (RXPR0[0]). RM1 is an interrupt
generated by the remote request pending flag for mailbox n (RFPR0[n]) or the data
frame receive flag for mailbox n (RXPR0[n]) (n = 1 to 15).
Interrupt
ERS_1
OVR_1
SLE_1
RM1_1*
RM0_1*
IRR1 is a data frame received interrupt flag for mailboxes 0 to 15, and IRR2 is a
remote frame request interrupt flag for mailboxes 0 to 15.
2
2
Description
Error Passive Mode (TEC ≥ 128 or REC ≥ 128)
Bus Off (TEC ≥ 256)/Bus Off recovery
Error warning (TEC ≥ 96)
Error warning (REC ≥ 96)
Message error detection
Reset/halt/CAN sleep transition
Overload frame transmission
Unread message overwrite (overrun)
Detection of CAN bus operation in CAN sleep
mode
Message transmission/transmission disabled
(slot empty)
Data frame reception/
Remote frame reception
Interrupt
Flag
IRR5
IRR6
IRR3
IRR4
IRR13*
IRR0
IRR7
IRR9
IRR12
IRR8
IRR1*
IRR2*
3
3
1
DTC
Activation
Not
possible
Possible