R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 847

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
19.4
The following sections describe RCAN-ET control registers. The address is mapped as follow.
Important: These registers can only be accessed in Word size (16-bit).
Table 19.5 RCAN-ET Control Registers Configuration
19.4.1
The Master Control Register (MCR) is a 16-bit read/write register that controls RCAN-ET.
• MCR (Address = H'000)
Bit 15 — ID Reorder (MCR15): This bit changes the order of STDID, RTR, IDE and EXTID of
both message control and LAFM.
Bit15: MCR15
0
1
Description
Master Control Register
General Status Register
Baud Rate Configuration Register 1
Baud Rate Configuration Register 0
Interrupt Request Register
Interrupt Mask Register
Error Counter Register
Initial value:
R/W:
Bit:
RCAN-ET Control Registers
Master Control Register (MCR)
MCR15 MCR14
R/W
15
1
R/W
14
0
Description
RCAN-ET is the same as HCAN2
RCAN-ET is not the same as HCAN2 (Initial value)
13
R
0
12
R
0
11
R
0
R/W
Address
000
002
004
006
008
00A
00C
10
0
TST[2:0]
R/W
9
0
R/W
8
0
MCR7 MCR6 MCR5
R/W
Name
MCR
GSR
BCR1
BCR0
IRR
IMR
TEC/REC
Section 19 Controller Area Network (RCAN-ET)
7
0
Rev. 2.00 Sep. 07, 2007 Page 819 of 1164
R/W
6
0
R/W
5
0
R
4
0
Access Size (bits)
Word
Word
Word
Word
Word
Word
Word
R
3
0
MCR2 MCR1 MCR0
REJ09B0321-0200
R/W
2
0
R/W
1
0
R/W
0
1

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