R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 906

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 20 A/D Converter (ADC)
Rev. 2.00 Sep. 07, 2007 Page 878 of 1164
REJ09B0321-0200
Bit
11 to 8
7, 6
Bit Name
TRGS[3:0]
CKS[1:0]
Initial
Value
0000
01
R/W
R/W
R/W
Description
Timer Trigger Select
These bits enable or disable starting of A/D conversion
by a trigger signal.
0000: Start of A/D conversion by external trigger input is
0001: A/D conversion is started by conversion trigger
0010: A/D conversion is started by conversion trigger
0011: A/D conversion is started by conversion trigger
0100: A/D conversion is started by conversion trigger
0101: Setting prohibited
0110: Setting prohibited
0111: Setting prohibited
1000: Setting prohibited
1001: A/D conversion is started by ADTRG
1010: A/D conversion is started by conversion trigger
1011 to 1111: Setting prohibited
Clock Select
These bits select the A/D conversion time.*
A/D conversion time while A/D conversion is halted
(ADST = 0).
00: Conversion time = 138 states (maximum)
01: Conversion time = 274 states (maximum)
10: Conversion time = 546 states (maximum)
11: Setting prohibited
disabled
TRGAN from MTU2
TRG0N from MTU2
TRG4AN from MTU2
TRG4BN from MTU2
from the TMR
2
Set the