R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 1162

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 29 Electrical Characteristics
29.3.11 SSI Module Timing
Table 29.15 SSI Module Timing
Conditions: PV
Rev. 2.00 Sep. 07, 2007 Page 1134 of 1164
REJ09B0321-0200
Item
Output clock cycle
Input clock cycle
Clock high
Clock low
Clock rise time
Delay
Setup time
Hold time
AUDIO_CLK
input frequency
SDA
SCL
[Legend]
S: Start condition
P: Stop condition
Sr: Start condition for retransmission
P*
PV
PV
t
BUF
CC
CC
SS
= V
= V
− 0.3 V ≤ AV
S*
t
Figure 29.33 I
Sf
V
V
SS
CC
t
IH
IL
STAH
R = PLLV
R = PLLV
Symbol Min.
t
t
t
t
t
t
t
t
f
t
SCLL
O
I
HC
LC
RC
DTR
SR
HTR
AUDIO
t
SCL
CC
t
SCLH
SS
CC
≤ PV
2
= AV
t
80
80
32
32
15
5
1
C Bus Interface 3 Input/Output Timing
Sr
= 3.0 V to 3.6 V, AV
CC
, AV
SS
Typ.
= 0 V
t
SDAH
ref
= 3.0 V to AV
Max.
64000 ns
64000 ns
20
50
40
Sr*
CC
Unit
ns
ns
ns
ns
ns
ns
MHz
= 3.0 V to 3.6 V,
t
STAS
CC
,
Remarks
Output
Input
Bidirectional
Output
(100 pF)
Transmit
Receive
Receive
t
t
SDAS
SP
t
STOS
Figure
Figure 29.34
Figures 29.35
and 29.36
Figures 29.37
and 29.38
Figures 29.37
and 29.38
Figure 29.39
P*

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