R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 256

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 Bus State Controller (BSC)
9.4.11
SDPWDCNT controls transition to and recovery from power-down mode.
Rev. 2.00 Sep. 07, 2007 Page 228 of 1164
REJ09B0321-0200
Bit
31 to 1
0
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
SDRAM Power-Down Control Register (SDPWDCNT)
Bit Name

DPWD
31
15
—
—
R
R
0
0
—
—
30
14
R
R
0
0
—
—
Initial
Value
All 0
0
29
13
R
R
0
0
—
—
28
12
R
R
0
0
—
—
27
11
R
R
0
0
R/W
R
R/W
—
—
26
10
R
R
0
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
SDRAM Common Power-Down Enable
This bit controls transition to and recovery from power-
down mode for all channels simultaneously. Setting
DPWD to 1 causes all channels to transition to power-
down mode. Clearing DPWD to 0 causes all channels
to recover from power-down mode. If an auto-refresh is
in progress, the transition to power-down mode is
delayed until the auto-refresh completes.
0: Power-down disabled
1: Power-down enabled
—
—
25
R
R
0
9
0
24
—
—
R
R
0
8
0
23
—
—
R
R
0
7
0
22
—
—
R
R
0
6
0
21
—
—
R
R
0
5
0
20
—
—
R
R
0
4
0
19
—
—
R
R
0
3
0
18
—
—
R
R
0
2
0
17
—
—
R
R
0
1
0
DPWD
R/W
16
—
R
0
0
0