R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 188

no-image

R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 6 Interrupt Controller (INTC)
6.10
6.10.1
The interrupt source flags should be cleared in the interrupt handler. After clearing the interrupt
source flag, "time from occurrence of interrupt request until interrupt controller identifies priority,
compares it with mask bits in SR, and sends interrupt request signal to CPU" shown in table 6.5 is
required before the interrupt source sent to the CPU is actually cancelled. To ensure that an
interrupt request that should have been cleared is not inadvertently accepted again, read the
interrupt source flag after it has been cleared, and then execute an RTE instruction.
Rev. 2.00 Sep. 07, 2007 Page 160 of 1164
REJ09B0321-0200
Usage Note
Timing to Clear an Interrupt Source

Related parts for R5S72011