R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 200

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 User Break Controller (UBC)
Rev. 2.00 Sep. 07, 2007 Page 172 of 1164
REJ09B0321-0200
Bit
6
5
4 to 0
Bit Name
PCB1
PCB0

Initial
Value
0
0
All 0
R/W
R/W
R/W
R
Description
PC Break Select 1
Selects the break timing of the instruction fetch cycle
for channel 1 as before or after instruction execution.
0: PC break of channel 1 is generated before
1: PC break of channel 1 is generated after instruction
PC Break Select 0
Selects the break timing of the instruction fetch cycle
for channel 0 as before or after instruction execution.
0: PC break of channel 0 is generated before
1: PC break of channel 0 is generated after instruction
Reserved
These bits are always read as 0. The write value
should always be 0.
instruction execution
execution
instruction execution
execution