R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 641

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

13.5.4
TCNT is cleared when compare match A or B occurs, depending on the settings of bits CCLR1
and CCLR0 in TCR. Figure 13.8 shows the timing of this operation.
13.5.5
TCNT is cleared at the rising edge or high level of an external reset input, depending on the
settings of bits CCLR1 and CCLR0 in TCR. The clear pulse width must be at least 2 states.
Figures 13.9 and 13.10 show the timing of this operation.
Timing of Counter Clear by Compare Match
Timing of TCNT External Reset
Pφ
External reset
input pin
Clear signal
TCNT
Pφ
Compare match
signal
TCNT
Pφ
External reset
input pin
Clear signal
TCNT
Figure 13.10 Timing of Clearance by External Reset (High Level)
Figure 13.9 Timing of Clearance by External Reset (Rising Edge)
Figure 13.8 Timing of Counter Clear by Compare Match
N – 1
N – 1
N
Rev. 2.00 Sep. 07, 2007 Page 613 of 1164
N
N
Section 13 8-Bit Timers (TMR)
H'00
H'00
H'00
REJ09B0321-0200