R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 601

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
(7)
Figure 12.131 shows an explanatory diagram of the case where an error occurs in PWM mode 1
and operation is restarted in normal mode after re-setting.
1. After a power-on reset, MTU2 output is low and ports are in the high-impedance state.
2. Set PWM mode 1.
3. For channels 3 and 4, enable output with TOER before initializing the pins with TIOR.
4.
5. Set MTU2 output with the PFC.
6. The count operation is started by TSTR.
7. Output goes low on compare-match occurrence.
8. An error occurs.
9. Set port output with the PFC and output the inverse of the active level.
10. The count operation is stopped by TSTR.
11. Set normal mode.
12. Initialize the pins with TIOR.
13. Set MTU2 output with the PFC.
14. Operation is restarted by TSTR.
MTU2
module output
TIOC*A
TIOC*B
Port output
PB, PC, PD*
PB, PC, PD*
compare-match occurrence. In PWM mode 1, the TIOC*B side is not initialized.)
Notes: 1. This pin is multiplexed with TIOC*A.
Initialize the pins with TIOR. (The example shows initial high output, with low output on
Operation when Error Occurs during PWM Mode 1 Operation, and Operation is
Restarted in Normal Mode
Figure 12.131 Error Occurrence in PWM Mode 1, Recovery in Normal Mode
2. This pin is multiplexed with TIOC*B.
1
2
Power-on
reset
1
(PWM1)
TMDR
2
High-Z
High-Z
TOER
(1)
3
(1 init
0 out)
TIOR
4
Not initialized (TIOC*B)
(MTU2)
PFC
5
TSTR
(1)
6
Match
7
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
occurs
Error
8
(PORT)
PFC
Rev. 2.00 Sep. 07, 2007 Page 573 of 1164
9
TSTR
(0)
10
(normal)
TMDR
11
0 out)
TIOR
(1 init
12
(MTU2)
PFC
REJ09B0321-0200
13
TSTR
(1)
14

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