R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 1179

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Table 1.2 Product Lineup
4.4.2 CKIO Control Register
(CKIOCR)
9.5.2 SDRAM Interface
(9) Read/Write Access
(c) Byte Access Control by DQM
Figure 9.26 SDRAMC Setting
Procedure
9.6.2 Write Buffer
9.6.3 Note on Transition to
Software Standby Mode or Deep
Standby Mode
Item
Main Revisions and Additions in this Edition
Page Revision (See Manual for Details)
8
86
260
264
285
Modified
Modified
When this LSI is started in clock operating mode 3, CKIOCR is
initialized to H'00 by a power-on reset caused by the RES pin
or in deep standby mode. When this LSI is started in clock
operating mode 0 or 2, CKIOCR is initialized to H'01 by a
power-on reset caused by the RES pin or in deep standby
mode. This register is not initialized by an internal reset
triggered by an overflow of the WDT, a manual reset, in sleep
mode, or in software standby mode.
Added
Figure modified
Added
Abbreviation
R5S72011
Rev. 2.00 Sep. 07, 2007 Page 1151 of 1164
Main Revisions and Additions in this Edition
Product Code
R5S72011RB120FP
R5S72011RW100FP
REJ09B0321-0200