R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 595

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Figure 12.125 shows an explanatory diagram of the case where an error occurs in normal mode
and operation is restarted in normal mode after re-setting.
1. After a power-on reset, MTU2 output is low and ports are in the high-impedance state.
2. After a power-on reset, the TMDR setting is for normal mode.
3. For channels 3 and 4, enable output with TOER before initializing the pins with TIOR.
4. Initialize the pins with TIOR. (The example shows initial high output, with low output on
5. Set MTU2 output with the PFC.
6. The count operation is started by TSTR.
7. Output goes low on compare-match occurrence.
8. An error occurs.
9. Set port output with the PFC and output the inverse of the active level.
10. The count operation is stopped by TSTR.
11. Not necessary when restarting in normal mode.
12. Initialize the pins with TIOR.
13. Set MTU2 output with the PFC.
14. Operation is restarted by TSTR.
MTU2
module output
TIOC*A
TIOC*B
Port output
PB, PC, PD*
PB, PC, PD*
compare-match occurrence.)
Notes: 1. This pin is multiplexed with TIOC*A.
Figure 12.125 Error Occurrence in Normal Mode, Recovery in Normal Mode
2. This pin is multiplexed with TIOC*B.
1
2
Power-on
reset
1
(normal)
TMDR
2
High-Z
High-Z
TOER
(1)
3
0 out)
(1 init
TIOR
4
(MTU2)
PFC
5
TSTR
(1)
6
Match
7
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
occurs
Error
8
(PORT)
Rev. 2.00 Sep. 07, 2007 Page 567 of 1164
PFC
9
TSTR
(0)
10
(normal)
TMDR
11
(1 init
0 out)
TIOR
12
(MTU2)
REJ09B0321-0200
PFC
13
TSTR
14
(1)