R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 861

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

19.4.4
The interrupt register (IRR) is a 16-bit read/write-clearable register containing status flags for the
various interrupt sources.
• IRR (Address = H'008)
Bits 15 to 14: Reserved.
Bit 13 - Message Error Interrupt (IRR13): This interrupt indicates that:
• A message error has occurred when in test mode.
• Note: If a Message Overload condition occurs when in Test Mode, then this bit will not be set.
Bit 13: IRR13
0
1
Initial value:
When not in test mode this interrupt is inactive.
R/W:
Bit:
Interrupt Request Register (IRR)
15
—
R
0
14
—
R
0
IRR13 IRR12
Description
message error has not occurred in test mode (Initial value)
[Clearing condition] Writing 1
[Setting condition] message error has occurred in test mode
R/W
13
0
R/W
12
0
11
—
R
0
10
—
R
0
IRR9 IRR8 IRR7 IRR6 IRR5 IRR4 IRR3 IRR2 IRR1 IRR0
R
9
0
R
8
0
R/W
Section 19 Controller Area Network (RCAN-ET)
7
0
Rev. 2.00 Sep. 07, 2007 Page 833 of 1164
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
REJ09B0321-0200
R
2
0
R
1
0
R/W
0
1