R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 730

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 16 Serial Communication Interface with FIFO (SCIF)
16.4
16.4.1
For serial communication, the SCIF has an asynchronous mode in which characters are
synchronized individually, and a clocked synchronous mode in which communication is
synchronized with clock pulses.
The SCIF has a 16-stage FIFO buffer for both transmission and receptions, reducing the overhead
of the CPU, and enabling continuous high-speed communication. The transmission format is
selected in the serial mode register (SCSMR), as shown in table 16.9. The SCIF clock source is
selected by the combination of the CKE1 and CKE0 bits in the serial control register (SCSCR), as
shown in table 16.10.
(1)
• Data length is selectable: 7 or 8 bits
• Parity bit is selectable. So is the stop bit length (1 or 2 bits). The combination of the preceding
• In receiving, it is possible to detect framing errors, parity errors, receive FIFO data full,
• The number of stored data bytes is indicated for both the transmit and receive FIFO registers.
• An internal or external clock can be selected as the SCIF clock source.
(2)
• The transmission/reception format has a fixed 8-bit data length.
• In receiving, it is possible to detect overrun errors (ORER).
• An internal or external clock can be selected as the SCIF clock source.
Rev. 2.00 Sep. 07, 2007 Page 702 of 1164
REJ09B0321-0200
selections constitutes the communication format and character length.
overrun errors, receive data ready, and breaks.
 When an internal clock is selected, the SCIF operates using the on-chip baud rate
 When an external clock is selected, the external clock input must have a frequency 16 times
 When an internal clock is selected, the SCIF operates using the on-chip baud rate
 When an external clock is selected, the SCIF operates on the input serial clock. The on-
Asynchronous Mode
Clocked Synchronous Mode
generator.
the bit rate. (The on-chip baud rate generator is not used.)
generator, and outputs a serial clock signal to external devices.
chip baud rate generator is not used.
Operation
Overview

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