R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 575

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

(4)
After a status flag is read as 1 by the CPU, it is cleared by writing 0 to it. Figures 12.105 and
12.106 show the timing for status flag clearing by the CPU, and figure 12.107 show the timing for
status flag clearing by the DMAC.
Status Flag Clearing Timing
Figure 12.105 Timing for Status Flag Clearing by CPU (Channels 0 to 4)
Figure 12.106 Timing for Status Flag Clearing by CPU (Channel 5)
Pφ
Address
Write signal
Status flag
Interrupt
request signal
Pφ
Address
Write signal
Status flag
Interrupt
request signal
TSR write cycle
TSR write cycle
TSR address
TSR address
T1
T1
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
T2
T2
Rev. 2.00 Sep. 07, 2007 Page 547 of 1164
REJ09B0321-0200