R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 848

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 19 Controller Area Network (RCAN-ET)
This bit can be modified only in reset mode.
Bit 14 — Auto Halt Bus Off (MCR14): If both this bit and MCR6 are set, MCR1 is
automatically set as soon as RCAN-ET enters BusOff.
This bit can be modified only in reset mode.
Bit 13 — Reserved. The written value should always be '0' and the returned value is '0'.
Bit 12 — Reserved. The written value should always be '0' and the returned value is '0'.
Bit 11 — Reserved. The written value should always be '0' and the returned value is '0'.
Rev. 2.00 Sep. 07, 2007 Page 820 of 1164
REJ09B0321-0200
Bit14: MCR14
0
1
Note: n = 0 to 15 (mailbox number)
MCR15 (ID Reorder) = 0
MCR15 (ID Reorder) = 1
H'100 + n × 32
H'102 + n × 32
H'104 + n × 32
H'106 + n × 32
H'100 + n × 32
H'102 + n × 32
H'104 + n × 32
H'106 + n × 32
Address
Address
LAFM
IDE_
IDE
15
15
0
0
RTR
14
14
0
13
13
0
0
Description
RCAN-ET remains in BusOff for normal recovery sequence
(128 × 11 Recessive Bits) (Initial value)
RCAN-ET moves directly into Halt Mode after it enters BusOff if MCR6 is set.
12
12
11
11
STDID_LAFM[10:0]
10
10
STDID[10:0]
Figure 19.5 ID Reorder
9
9
EXTID_LAFM[15:0]
EXTID_LAFM[15:0]
EXTID[15:0]
EXTID[15:0]
STDID_LAFM[10:0]
8
8
STDID[10:0]
7
7
6
6
5
5
4
4
RTR
3
0
3
LAFM
IDE
IDE_
2
2
EXTID[17:16]
EXTID[17:16]
EXTID_LAFM
EXTID_LAFM
1
1
[17:16]
[17:16]
0
0
Access Size
Access Size
Word/LW
Word/LW
Word/LW
Word/LW
Word
Word
Word
Word
LAFM Field
LAFM Field
Feld Name
Feld Name
Control 0
Control 0

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