R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 493

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

• When TGR is an input capture register
(1)
Figure 12.16 shows an example of the buffer operation setting procedure.
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in the timer general register is transferred to the buffer register.
This operation is illustrated in figure 12.15.
Example of Buffer Operation Setting Procedure
Figure 12.16 Example of Buffer Operation Setting Procedure
Input capture
signal
Select TGR function
Set buffer operation
<Buffer operation>
register
Buffer operation
Buffer
Start count
Figure 12.15 Input Capture Buffer Operation
[1]
[2]
[3]
Timer general
register
[1] Designate TGR as an input capture register or
[2] Designate TGR for buffer operation with bits
[3] Set the CST bit in TSTR to 1 start the count
output compare register by means of TIOR.
BFA and BFB in TMDR.
operation.
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 2.00 Sep. 07, 2007 Page 465 of 1164
TCNT
REJ09B0321-0200