R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 1142
R5S72011
Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72011.pdf
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Section 29 Electrical Characteristics
29.3.2
Table 29.6 Control Signal Timing
Conditions: PV
Notes: 1. The RES, MRES, NMI, IRQ7 to IRQ0 and PINT7 to PINT0 signals are asynchronous
Rev. 2.00 Sep. 07, 2007 Page 1114 of 1164
REJ09B0321-0200
Item
RES pulse width
RES setup time*
MRES pulse width
MRES setup time*
NMI pulse width
NMI setup time*
NMI hold time
IRQ7 to IRQ0 pulse width
IRQ7 to IRQ0 setup time*
IRQ7 to IRQ0 hold time
PINT7 to PINT0 setup time*
2. In software standby mode, deep standby mode or when the clock multiplication ratio is
3. In software standby mode or deep standby mode, t
4. In software standby mode or deep standby mode, t
Control Signal Timing
signals. When the setup time is satisfied, change of signal level is detected at the rising
edge of the clock. If not, the detection can be delayed until the rising edge of the next
clock.
changed, t
PV
PV
CC
CC
SS
1
1
= V
= V
− 0.3 V ≤ AV
1
RESW
SS
CC
R = PLLV
R = PLLV
= t
1
1
OSC2
(min).
CC
SS
CC
≤ PV
= AV
= 3.0 V to 3.6 V, AV
Symbol
t
t
t
t
t
t
t
t
t
t
t
RESW
RESS
MRESW
MRESS
NMIW
NMIS
NMIH
IRQW
IRQS
IRQH
PINTS
CC
, AV
SS
= 0 V
ref
Min.
20*
200
20*
200
20*
150
10
20*
150
10
150
= 3.0 V to AV
2
3
4
4
Bφ = 60 MHz
CC
Max.
= 3.0 V to 3.6 V,
MRESW
NMIW
CC
,
/t
IRQW
= t
OSC2
= t
Unit
t
ns
t
ns
t
ns
ns
t
ns
ns
ns
cyc
cyc
cyc
cyc
OSC3
(min).
(min).
Figure
Figures 29.4, 29.5,
and 29.8
Figures 29.6, 29.9
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