R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 76

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 2 CPU
2.4.3
Table 2.12 Arithmetic Operation Instructions
Rev. 2.00 Sep. 07, 2007 Page 48 of 1164
REJ09B0321-0200
Instruction
ADD
ADD
ADDC
ADDV
CMP/EQ
CMP/EQ
CMP/HS
CMP/GE
CMP/HI
CMP/GT
CMP/PL
CMP/PZ
CMP/STR Rm,Rn
Rm,Rn
Rm,Rn
Rn
Rn
Rm,Rn
#imm,Rn
Rm,Rn
#imm,R0
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Arithmetic Operation Instructions
Instruction Code
0011nnnnmmmm1100
0111nnnniiiiiiii
0011nnnnmmmm1110
0011nnnnmmmm1111
10001000iiiiiiii
0011nnnnmmmm0000
0011nnnnmmmm0010
0011nnnnmmmm0011
0011nnnnmmmm0110
0011nnnnmmmm0111
0100nnnn00010101
0100nnnn00010001
0010nnnnmmmm1100
Operation
Rn + Rm → Rn
Rn + imm → Rn
Rn + Rm + T → Rn, carry → T 1
Rn + Rm → Rn, overflow → T 1
When R0 = imm, 1 → T
Otherwise, 0 → T
When Rn = Rm, 1 → T
Otherwise, 0 → T
When Rn ≥ Rm (unsigned),
1 → T
Otherwise, 0 → T
When Rn ≥ Rm (signed),
1 → T
Otherwise, 0 → T
When Rn > Rm (unsigned),
1 → T
Otherwise, 0 → T
When Rn > Rm (signed),
1 → T
Otherwise, 0 → T
When Rn > 0, 1 → T
Otherwise, 0 → T
When Rn ≥ 0, 1 → T
Otherwise, 0 → T
When any bytes are equal,
1 → T
Otherwise, 0 → T
Execu-
tion
Cycles
1
1
1
1
1
1
1
1
1
1
1
T Bit


Carry
Over-
flow
Com-
parison
result
Com-
parison
result
Com-
parison
result
Com-
parison
result
Com-
parison
result
Com-
parison
result
Com-
parison
result
Com-
parison
result
Com-
parison
result
SH2,
SH2E SH4
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Compatibility
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
SH-2A
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes