R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 293

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

(b) Procedure for Transition to and Recovery from Self-Refresh Mode
Figure 9.27 shows the procedure for transitioning to and recovering from self-refresh mode.
Note: Before transitioning to or recovering from self-refresh mode it is necessary to halt
Figure 9.27 Procedure for Transition to and Recovery from Self-Refresh Mode
SDRAM access to the affected channels. Consequently, it is not possible to transition to or
recover from self-refresh mode while programs or DMA operations that access SDRAM
are in progress. Pay attention to the following points when writing programs.
• Before transitioning to self-refresh mode, halt any DMA channel transfers that access
• Make sure that programs run while transitioning to self-refresh mode, while in self-
the SDRAM area of the affected channels.
refresh mode, or while recovering from self-refresh mode do not access operands or
fetch (or pre-fetch) instructions stored in the SDRAM area.
Access enabled status
(DRFEN = 1, EXENB = 1)
Initialization sequence
(1) Halt any DMA access to SDRAM area
(2) Halt access to all SDRAMC channels (EXENB = 0) by means of program
(3) Confirm that EXENB has been cleared to 0
Start self-refresh
(1) Confirm that all status bits in SDSTR have been cleared to 0
(2) Set DSFEN bit to 1 by means of program assigned to other than SDRAM area
End self-refresh
(1) Confirm that all status bits in SDSTR have been cleared to 0
(2) Clear DSFEN bit to 0 by means of program assigned to other than SDRAM
Enable access
Enable access to SDRAMC (EXENB = 1) by means of program assigned to other
than SDRAM area
Access enabled status
(DRFEN = 1, EXENB = 1)
assigned to other than SDRAM area
area
Self-refresh mode
Rev. 2.00 Sep. 07, 2007 Page 265 of 1164
Section 9 Bus State Controller (BSC)
REJ09B0321-0200