R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 675

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
15.3.10 Minute Alarm Register (RMINAR)
RMINAR is an alarm register corresponding to the minute counter RMINCNT. When the ENB bit
is set to 1, a comparison with the RMINCNT value is performed. From among
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR/RCR3, the counter and alarm
register comparison is performed only on those with ENB bits set to 1, and if each of those
coincides, an alarm flag of RCR1 is set to 1.
The assignable range is from 00 through 59 + ENB bits (practically in BCD), otherwise operation
errors occur.
The ENB bit in RMINAR is initialized by a power-on reset or in deep standby mode. The other
bits are not initialized by a power-on reset or manual reset, or in deep standby and software
standby modes.
Bit
7
6 to 4
3 to 0
Bit Name
ENB
10 minutes
1 minute
Initial value:
Initial
Value
0
Undefined R/W
Undefined R/W
R/W:
Bit:
ENB
R/W
7
0
R/W
R/W
R/W
6
10 minutes
Description
When this bit is set to 1, a comparison with the
RMINCNT value is performed.
Ten's position of minutes setting value
One's position of minutes setting value
R/W
5
R/W
4
R/W
3
Rev. 2.00 Sep. 07, 2007 Page 647 of 1164
R/W
1 minute
2
R/W
1
Section 15 Realtime Clock (RTC)
R/W
0
REJ09B0321-0200

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