R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 424

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
Table 12.17 TIORL_3 (Channel 3)
[Legend]
X:
Notes: 1. After power-on reset, 0 is output until TIOR is set.
Rev. 2.00 Sep. 07, 2007 Page 396 of 1164
REJ09B0321-0200
Bit 7
IOD3
0
1
Don't care
2. When the BFB bit in TMDR_3 is set to 1 and TGRD_3 is used as a buffer register, this
Bit 6
IOD2
0
1
X
setting is invalid and input capture/output compare is not generated.
Bit 5
IOD1
0
1
0
1
0
1
Bit 4
IOD0
0
1
0
1
0
1
0
1
0
1
X
TGRD_3
Function
Output
compare
register*
Input capture
register*
2
2
TIOC3D Pin Function
Output retained*
Initial output is 0
0 output at compare match
Initial output is 0
1 output at compare match
Initial output is 0
Toggle output at compare match
Output retained
Initial output is 1
0 output at compare match
Initial output is 1
1 output at compare match
Initial output is 1
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Description
1