R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 826

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 18 Serial Sound Interface (SSI)
18.4.5
Like transmission, reception can be controlled either by DMA or interrupt.
Figures 18.22 and 18.23 show the flow of operation.
When disabling the SSI module, the SSI clock* must be kept supplied until the IIRQ bit is in idle
state.
Note: * Input clock from the SSISCK pin when SCKD = 0.
Rev. 2.00 Sep. 07, 2007 Page 798 of 1164
REJ09B0321-0200
Receive Operation
Input clock from the AUDIO_CLK pin, or AUDIO_X1 and AUDIO_X2 pins when
SCKD = 1.

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