R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 1006
R5S72011
Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72011.pdf
(1196 pages)
- Current page: 1006 of 1196
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Section 23 Pin Function Controller (PFC)
23.1.10 Port F I/O Register (PFIOR)
PFIOR is a 16-bit readable/writable register that selects the I/O direction for the port F pins. Bits
PF7IOR to PF0IOR correspond to pins PF7 to PF0, respectively. PFIOR is enabled when the
function of the port F pins is set to general-purpose I/O (PF7 to PF0) by PFCR, and are disabled in
other cases. When a bit in PFIOR is set to 1, the corresponding pin is set to output, and when set
to 0, the pin is set to input.
Bits 15 to 8 in PFIOR are reserved. These bits are always read as 0. The write value should always
be 0.
PFIOR is initialized to H'0000 by a power-on reset or by switching to deep standby mode. This
register is not initialized either by a manual reset or by switching to sleep mode or software
standby mode.
Rev. 2.00 Sep. 07, 2007 Page 978 of 1164
REJ09B0321-0200
Initial value:
R/W:
Bit:
15
—
R
0
14
—
R
0
13
—
R
0
12
—
R
0
11
—
R
0
10
—
R
0
—
R
9
0
—
R
8
0
R/W
PF7
IOR
7
0
R/W
PF6
IOR
6
0
R/W
PF5
IOR
5
0
R/W
PF4
IOR
4
0
R/W
PF3
IOR
3
0
R/W
PF2
IOR
2
0
R/W
PF1
IOR
1
0
R/W
PF0
IOR
0
0
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