R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 659

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

14.4.4
When operating in interval timer mode, interval timer interrupts are generated at every overflow of
the counter. This enables interrupts to be generated at set periods.
1. Clear the WT/IT bit in WTCSR to 0, set the type of count clock in the CKS[2:0] bits in
2. Set the TME bit in WTCSR to 1 to start the count in interval timer mode.
3. When the counter overflows, the WDT sets the IOVF bit in WTCSR to 1 and an interval timer
WTCNT value
H'FF
[Legend]
ITI: Interval timer interrupt request generation
WTCSR, and set the initial value of the counter in WTCNT.
interrupt request is sent to the INTC. The counter then resumes counting.
H'00
WT/IT = 0
Using Interval Timer Mode
TME = 1
Figure 14.5 Operation in Interval Timer Mode
Overflow
ITI
Overflow
ITI
Rev. 2.00 Sep. 07, 2007 Page 631 of 1164
Overflow
ITI
Section 14 Watchdog Timer (WDT)
Overflow
REJ09B0321-0200
ITI
Time