R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 707

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Bit
2
1, 0
Bit Name
CKE[1:0]
Initial
Value
0
00
R/W
R
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Clock Enable
Select the SCIF clock source and enable or disable
clock output from the SCK pin. Depending on the
combination of these bits, the SCK pin can be used for
serial clock output or serial clock input. If serial clock
output is set in clocked synchronous mode, the C/A bit
in SCSMR is set to 1, and then these bits are set.
00: Internal clock, SCK pin used for input pin (input
01: Internal clock, SCK pin used for clock output
10: External clock, SCK pin used for clock input
11: Setting prohibited
00: Internal clock, SCK pin used for serial clock output
01: Internal clock, SCK pin used for serial clock output
10: External clock, SCK pin used for serial clock input
11: Setting prohibited
Section 16 Serial Communication Interface with FIFO (SCIF)
Asynchronous mode
Clocked synchronous mode
signal is ignored)
(The output clock frequency is 16 times the bit rate.)
(The input clock frequency is 16 times the bit rate.)
Rev. 2.00 Sep. 07, 2007 Page 679 of 1164
REJ09B0321-0200

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