R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 538

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R5S72011

Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
(m) Counter Clearing by Another Channel
In complementary PWM mode, by setting a mode for synchronization with another channel by
means of the timer synchronous register (TSYR), and selecting synchronous clearing with bits
CCLR2 to CCLR0 in the timer control register (TCR), it is possible to have TCNT_3, TCNT_4,
and TCNTS cleared by another channel.
Figure 12.55 illustrates the operation.
Use of this function enables counter clearing and restarting to be performed by means of an
external signal.
Input capture A
Rev. 2.00 Sep. 07, 2007 Page 510 of 1164
REJ09B0321-0200
Channel 1
TGRA_3
H'0000
TCDR
TDDR
Figure 12.55 Counter Clearing Synchronized with Another Channel
TCNT_3
TCNT_4
TCNT_1
TCNTS
Synchronous counter clearing by channel 1 input capture A

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