R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 685

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

15.3.18 RTC Control Register 3 (RCR3)
When the ENB bit in RCR3 is set to 1, RCR3 compares the value of RYRCNT and that of
RYRAR. From among RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR/RCR3, the
counter and alarm register comparison is performed only on those with ENB bits set to 1, and if
each of those coincides, an alarm flag of RCR1 is set to 1.
The ENB bit in RCR3 is initialized by a power-on reset or in deep standby mode. Remaining
fields of RCR3 are not initialized by a power-on reset or manual reset, or in deep standby and
software standby modes.
Bit
7
6 to 0
Bit Name
ENB

Initial value:
Initial
Value
0
All 0
R/W:
Bit:
ENB
R/W
7
0
R/W
R/W
R
—
R
6
0
Description
When this bit is set to 1, comparison of the year alarm
register (RYRAR) and the year counter (RYRCNT) is
performed.
Reserved
These bits are always read as 0. The write value should
always be 0.
—
R
5
0
—
R
4
0
—
R
3
0
Rev. 2.00 Sep. 07, 2007 Page 657 of 1164
—
R
2
0
—
R
1
0
Section 15 Realtime Clock (RTC)
—
R
0
0
REJ09B0321-0200