R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 461

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

12.3.16 Timer Counter Synchronous Start Register (TCSYSTR)
TCSYSTR is an 8-bit readable/writable register that specifies synchronous start of the MTU2
counters.
Bit
7
6
Bit Name
SCH0
SCH1
Initial value:
Initial
Value
0
0
Note:
R/W:
*
Bit:
Only 1 can be written to set the register.
R/(W)*R/(W)*R/(W)*R/(W)*R/(W)*
SCH0 SCH1 SCH2 SCH3 SCH4
R/W
R/(W)* Synchronous Start
R/(W)* Synchronous Start
7
0
6
0
Description
Controls synchronous start of TCNT_0 in the MTU2.
0: Does not specify synchronous start for TCNT_0 in
1: Specifies synchronous start for TCNT_0 in the MTU2
[Clearing condition]
•
Controls synchronous start of TCNT_1 in the MTU2.
0: Does not specify synchronous start for TCNT_1 in
1: Specifies synchronous start for TCNT_1 in the MTU2
[Clearing condition]
•
5
0
the MTU2
the MTU2
When 1 is set to the CST0 bit of TSTR in MTU2
while SCH0 = 1
When 1 is set to the CST1 bit of TSTR in MTU2
while SCH1 = 1
4
0
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
3
0
Rev. 2.00 Sep. 07, 2007 Page 433 of 1164
—
R
2
0
—
R
1
0
—
R
0
0
REJ09B0321-0200