R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 689
R5S72011
Manufacturer Part Number
R5S72011
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72011.pdf
(1196 pages)
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15.5
15.5.1
Do not write to the count registers (RSECCNT, RMINCNT, RHRCNT, RDAYCNT, RWKCNT,
RMONCNT, and RYRCNT) during the RTC counting (while the START bit in RCR2 is 1). If any
of the count registers is written to during the RTC counting, the count register may not be read
correctly immediately after the execution of a write instruction. The RTC counting must be
stopped before writing to any of the count registers.
15.5.2
The method of using the periodic interrupt function is shown in figure 15.5.
A periodic interrupt can be generated periodically at the interval set by the flags PES0 to PES2 in
RCR2. When the time set by the PES0 to PES2 has elapsed, the PEF is set to 1.
The PEF is cleared to 0 upon periodic interrupt generation or when the flags PES0 to PES2 are set.
Periodic interrupt generation can be confirmed by reading this bit, but normally the interrupt
function is used.
Usage Notes
Register Writing during RTC Count
Use of Realtime Clock (RTC) Periodic Interrupts
Figure 15.5 Using Periodic Interrupt Function
Elapse of time set by PES
Set PES, clear PEF
Clear PEF
Set PES0 to PES2,
and clear PEF to 0,
in RCR2
Clear PEF to 0
Rev. 2.00 Sep. 07, 2007 Page 661 of 1164
Section 15 Realtime Clock (RTC)
REJ09B0321-0200
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