R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 757

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

17.3.1
ICCR1 is an 8-bit readable/writable register that enables or disables the I
controls transmission or reception, and selects master or slave mode, transmission or reception,
and transfer clock frequency in master mode.
ICCR1 is initialized to H'00 by a power-on reset or deep standby mode.
Bit
7
6
I
2
Bit Name
ICE
RCVD
C Bus Control Register 1 (ICCR1)
Initial value:
Initial
Value
0
0
R/W:
Bit:
R/W
ICE RCVD MST
7
0
R/W
R/W
R/W
R/W
6
0
Description
I
0: This module is halted.
1: This bit is enabled for transfer operations.
Reception Disable
Enables or disables the next operation when TRS is 0
and ICDRR is read.
0: Enables next reception
1: Disables next reception
R/W
2
C Bus Interface 3 Enable
5
0
TRS
R/W
4
0
R/W
3
0
Rev. 2.00 Sep. 07, 2007 Page 729 of 1164
R/W
CKS[3:0]
2
0
Section 17 I
R/W
1
0
R/W
2
0
0
C bus interface 3,
2
C Bus Interface 3 (IIC3)
REJ09B0321-0200