R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 149

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

6.3.2
ICR0 is a 16-bit register that sets the input signal detection mode for the external interrupt input
pin NMI, and indicates the input level at the NMI pin. ICR0 is initialized by a power-on reset or in
deep standby mode.
Bit
15
14 to 9
8
7 to 0
Initial value:
Note: * 1 when the NMI pin is high, and 0 when the NMI pin is low.
R/W:
Bit:
Interrupt Control Register 0 (ICR0)
NMIL
Bit Name
NMIL

NMIE

15
R
*
14
—
R
0
13
—
R
0
Initial
Value
*
All 0
0
All 0
12
—
R
0
11
—
R
0
R/W
R
R
R/W
R
10
—
R
0
Description
NMI Input Level
Sets the level of the signal input at the NMI pin. The
NMI pin level can be obtained by reading this bit. This
bit cannot be modified.
0: Low level is input to NMI pin
1: High level is input to NMI pin
Reserved
These bits are always read as 0. The write value should
always be 0.
NMI Edge Select
Selects whether the falling or rising edge of the
interrupt request signal on the NMI pin is detected.
0: Interrupt request is detected on falling edge of NMI
1: Interrupt request is detected on rising edge of NMI
Reserved
These bits are always read as 0. The write value should
always be 0.
—
R
9
0
input
input
NMIE
R/W
8
0
—
R
7
0
Rev. 2.00 Sep. 07, 2007 Page 121 of 1164
—
R
6
0
Section 6 Interrupt Controller (INTC)
—
R
5
0
—
R
4
0
—
R
3
0
REJ09B0321-0200
—
R
2
0
—
R
1
0
—
R
0
0