R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 389

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

[Legend]
DMA (S): Internal cycles of source-side access by the DMAC
DMA (D): Internal cycles of destination-side access by the DMAC
Cycle-stealing transfer mode
Pipeline transfer mode
CKIO
DMA (S)
DMA (D)
DACT (SACT = 0, DACT = 0)
DACT (SACT = 1, DACT = 0)
DACT (SACT = 0, DACT = 1)
DACT (SACT = 1, DACT = 1)
DACK
CKIO
DMA (S)
DMA (D)
DACT (SACT = 0, DACT = 0)
DACT (SACT = 1, DACT = 0)
DACT (SACT = 0, DACT = 1)
DAC T (SACT = 1, DACT = 1)
DACK
Figure 11.11 Timing of DMA Acknowledge and DNA Active Signal Output
RD1
RD1
Single operand transfer (read 0 wait)
Single operand transfer (read 0 wait)
RD2
Section 11 Direct Memory Access Controller (DMAC)
WR1
WR1
RD3
RD2
RD3
WR2
Rev. 2.00 Sep. 07, 2007 Page 361 of 1164
WR3
WR2
WR3
REJ09B0321-0200
High
High