R5S72011 RENESAS [Renesas Technology Corp], R5S72011 Datasheet - Page 943

• Manufacturer Part Number: R5S72011
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

22.4.2
PDDR is a 16-bit readable/writable register that stores port D data. Bits PD14DR to PD0DR
correspond to pins PD14 to PD0, respectively.
If a pin is set to the general output function, that pin will output the value written to the
corresponding bit in PDDR, and the register value is read from PDDR regardless of the state of the
pin.
If a pin is set to the general input function, the pin state, not the register value, will be returned if
PDDR is read. Also, if a value is written to PDDR, although the value will actually be written, it
will have no influence on the state of the pin. Table 22.8 summarizes the PDDR read/write
operations.
Bit 15 in PDDR is reserved. This bit is read as 0. The write value should always be 0.
PDDR is initialized to H'0000 by a power-on reset or in deep standby mode. This register is not
initialized either by a manual reset or by switching to sleep mode or software standby mode.
Table 22.8 Port D Data Register (PDDR) Read/Write Operations
PDIOR
0
1
Initial value:
R/W:
Bit:
Port D Data Register (PDDR)
15
—
R
0
Pin Function
General input
Other than general
input
General output
Other than general
output
PD14
R/W
DR
14
0
PD13
R/W
DR
13
0
PD12
R/W
DR
12
0
PD11
R/W
DR
11
0
Read
Pin state
Pin state
Value of
PDDR
Value of
PDDR
PD10
R/W
DR
10
0
PD9
R/W
DR
9
0
PD8
R/W
DR
8
0
Write
The value is written to PDDR but there is no
effect on the pin state.
The value is written to PDDR but there is no
effect on the pin state.
The value written is output from the pin.
The value is written to PDDR but there is no
effect on the pin state.
PD7
R/W
DR
7
0
Rev. 2.00 Sep. 07, 2007 Page 915 of 1164
PD6
R/W
DR
6
0
R/W
PD5
DR
5
0
R/W
PD4
DR
4
0
R/W
PD3
DR
3
0
Section 22 I/O Ports
R/W
REJ09B0321-0200
PD2
DR
2
0
R/W
PD1
DR
1
0
R/W
PD0
DR
0
0