MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 965

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
The Parameter field is a single byte divided into bit fields as follows:
where:
One or more target address and value/bitmask pairs can be specified. The same bytes and
flags parameters apply to all locations in the command.
When successful, this command writes to each target address in accordance with the flags
as follows:
Notes:
Freescale Semiconductor, Inc.
Synchronous Serial Port 0 registers
Synchronous Serial Port 1 registers
7
"Mask:
• bytes: width of target location(s) in bytes. Either 1, 2 or 4.
• flags: control flags for command behavior.
• If any of the target addresses does not have the same alignment as the data width
• If any of the values is larger or any of the bitmasks is wider than permitted by the data
• If any of the target addresses do not lie within an allowed region, none of the values
6
0
0
1
1
flags
DRAM Controller registers
indicated in the parameter field, none of the values are written.
width indicated in the parameter field, none of the values are written.
are written. The list of allowable modules and target addresses for i.MX28 are given
below.
5
BCH ECC Accelerator
4
"Set"
Address Range
GMPI registers
3
0
1
0
1
bytes
2
1
*address &= ~val_msk
*address |= val_msk
*address = val_msk
*address = val msk
0
Table 12-17. Interpretation of Write Data Command Flags
Action
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Table 12-18. Valid DCD Address Ranges for i.MX28
Table 12-16. Write Data Command Parameter Field
Start Address
0x800E0000
0x8000A000
0x8000C000
0x80010000
0x80012000
Interpretation
Clear bitmask
Set bitmask
Write value
Write value
Last Address
0x800EFFFF
0x8000BFFF
0x8000DFFF
0x80011FFF
0x80013FFF
Chapter 12 Boot Modes
965

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